#announcement #risc-v February 11, 2021 CHIPS Alliance Welcomes Antmicro and VeriSilicon to the Platinum Membership Level
#project-update #pcie #litex #risc-v February 11, 2021 High-Throughput Open Source PCIe on Xilinx VU19P-Based ASIC Prototyping Platform
#project-update #yosys #verilator #uhdm #surelog #ibex #risc-v #opentitan January 7, 2021 Enabling Open Source Ibex Synthesis and Simulation in Verilator/Yosys via UHDM/Surelog
#announcement #openroad #yosys #f4pga December 15, 2020 Efabless Joins CHIPS Alliance to Accelerate the Growth of the Open Source Chip Ecosystem
#announcement #omnixtend December 8, 2020 CHIPS Alliance to Collaborate with RISC-V to Standardize an Open Unified Memory Leveraging OmniXtend
#announcement September 15, 2020 The CHIPS Alliance Workshop: 10 Talks From Industry Leaders, All For Free
#announcement #fpga August 11, 2020 QuickLogic Joins CHIPS Alliance to Expand Open Source FPGA Efforts
#release-notes #announcement July 16, 2020 CHIPS Alliance Announces AIB 2.0 Draft Specification to Accelerate Design of Open Source Chiplets
#project-update #risc-v #verilator #swerv July 10, 2020 CHIPS SweRV Cores and the Open Tools Ecosystem
#project-update #pdk #skywater June 29, 2020 Open Source Process Design Kit from Google, SkyWater Technologies and Partners Released
