CHIPS Alliance Spring Workshop 2023
July 13, 2023
Please join us for the next CHIPS Workshop hosted at Google in San Francisco. Details here.
Upcoming Events
Past Events
CHIPS Alliance Fall Workshop 2022
December 15, 2022
Check out the presentations below, and watch the replay here
- Caliptra – Bryan Kelly, Microsoft
- SBOM and HBOM / Zephyr - Kate Stewart, Linux Foundation
- F4PGA tools in the classroom - Mike Wirthlin, Jeff Goeders, BYU (slides)
- Datasets for Machine Learning for Chip Design - Aman Arora, UT-Austin (slides)
- Open source SystemVerilog / UVM support and scaling for large designs in Verilator 5.0 and beyond, Michael Gielda, Antmicro (slides)
- Lowering barriers to chip design using OpenFASOC, AWG activities and tapeouts, Mehdi Saligane, University of Michigan (slides)
- Global Foundries Open PDK, Karthik Chandrasekaran, Global Foundries
- Caravel SOC Learnings, Mohammed Kassem, Efabless, (slides)
- Intel Compiler for SystemC, Mikhail Moiseev, Intel (slides)
- Renode co-simulation for Caravel, Peter Gielda, Antmicro (slides)
CHIPS Alliance First 2022 Biannual Technology Update
April 19, 2022
Check out the presentations below:
- Introduction – Rob Mains, CHIPS Alliance
- Updates of Android on RISC-V – Han Mao, Alibaba (slides)
- Chisel and FIRRTL for Next-Generation SoC Designs– Jack Koenig, SiFive (slides)
- Introducting the F4PGA Workgroup– Michael Gielda, Karol Gugala, Antmicro (slides)
- Chiplet IP Protocol– Dave Kehlet, Intel (slides)
- NVMe Computational Storage Processor for Edge & Datacenter Applications, Anand Kulkarni, Wester Digital (slides)
- Towards Open Source Models of Cryogenic CMOS : Brian Hoskins and Pragya Shrestha, NIST (slides)
- Latest Statistics from Google’s No Cost Shuttle Program : Tim Ansell, Google : (slides)
CHIPS Alliance Fall Workshop 2021
October 12, 2021
Check out the presentations below, and watch the replay here
- Porting Android to RISC-V Alibaba – Guoyin Chen and Han Mao, Alibaba (replay) (slides)
- Practical Adoption of Open Source System Verilog Tools – Michael Gielda, Antmicro (replay) (slides)
- Chisel and FIRRTL for Next-Generation SoC Designs– Jack Koenig, SiFive (replay) (slides)
- OpenFASOC: Automated Open Source Analog and Mixed-Signals IC Generation – Mehdi Saligane, University of Michigan (UMICH) (replay) (slides)
- FPGA Tooling Interoperability with the FPGA Interchange Format – Maciej Kurc, Antmicro (replay) (slides)
- OmniXtend: Scalability and LPC – Jaco Hofmann, Western Digital Corporation (replay) (slides)
- Open Source NVME IP with AI Acceleration – Anand Kulkarni, Western Digital Corporation and Karol Gugala, Antmicro (replay) (slides)
- Automating Analog Layout using ALIGN – Sachin Sapatnekar, University of Minnesota (UMN) (replay) (slides)
CHIPS Alliance Spring Workshop 2021
March 30, 2021
Check out the presentations below, and watch the replay here
- Chipyard - Bora Nikolic, UC Berkeley (slides)
- RISC-V DV Workgroup Updates Tao Liu / Matt Cockrell, Google (slides)
- Open Source Flows in ASIC & FPGA Development Michael Gielda, Antmicro
- Open-Source AIB Chiplet Ecosystem David Kehlet, Intel (slides)
- OmniXtend Milestone Updates Dejan Vucinic, Western Digital (slides)
- Chisel advances for next-gen SOC Designs Jack Koenig, SiFive (slides)
- Codasip SweRV Core Support Package in a Nutshell Zdenek Prikyl, Codasip (slides)
- An Introduction to the OpenROAD project Andrew Kahng / Tom Spyrou, OpenROAD (slides)
- Open Source FPGA Tooling Brian Faith, Quicklogic (slides)
- Fully Open Silicon Down to the Transistor Tim Ansell, Google (slides)